1. Field of Invention
The present invention relates generally to DC-DC power conversion.
2. Description of the Background
DC-to-DC power converters are power-processing circuits that typically are used to convert an unregulated input DC voltage to a regulated DC output voltage. Switched-mode DC-to-DC power converters typically include an inverter, a transformer having a primary winding coupled to the inverter, and a rectifying circuit coupled to a secondary winding of the transformer. The inverter typically includes a switching device, such as a field effect transistor (FET), that converts the DC input voltage to an alternating voltage, which is magnetically coupled from the primary winding of the transformer to the secondary winding. A control circuit regulates conduction of the switching device. The rectifying circuit rectifies the alternating voltage on the secondary winding to generate a desired DC output voltage.
There are several known techniques for controlling the switching device(s) of a switched-mode converter. In conventional current mode DC-DC converters, the duty cycle of the switching device of the converter is modulated by a negative feedback voltage loop to maintain the desired output voltage. The negative feedback loop ordinarily includes a voltage error amplifier that compares a signal indicative of the output voltage to a reference voltage. In typical current mode control circuits, when the sum of the sensed transformer current and the compensating ramp from the voltage error amplifier exceed an error current signal, a latch is reset and the switching device is turned OFF.
To enhance power-processing density, or to meet increased current demands of the load, it is often desirous to connect several switch-mode converters in parallel. In a typical paralleled switch-mode converter configuration, each converter is designed to contribute an equal amount of current to the load in the presence of inevitable variations in reference voltages and component values.
Several techniques for enhancing current sharing between paralleled converters are known. One technique when using current mode control is to tie the outputs of the respective voltage error amplifiers together. This technique is sometimes referred to as the xe2x80x9ccomp pinxe2x80x9d technique. Another distinct technique is to derive a share function that uses a sensor amplifier to generate a share bus that is proportional to the total load current. A slow speed servo loop can then adjust the voltage loop of each converter to force balance of the load current between the paralleled converters.
In one general respect, the present invention is directed to a power supply. According to one embodiment, the power supply includes first and second current mode controlled power converters connected in parallel for powering a load. Each of the paralleled power converters may include a voltage error amplifier, and the output terminals of the respective voltage error amplifiers may be tied together. The power supply further includes a slow loop current share control circuit that is responsive to a sensed current in each of the power converters and, based on the sensed currents, forces the power converters to equally contribute to the load current.
According to various embodiments, the power converters may be buck converters, boost converter, buck-boost converter, or any other derived topology. The converters may also include a synchronous rectifier. In addition, the power supply may include more than two converters connected in parallel.
According to one embodiment, the slow loop current share control circuit may include a first current sense integrating circuit responsive to the sensed current in the first converter and a second current sense integrating circuit responsive to a sensed current in the second converter. The slow loop current share control circuit may also include two differential integrating circuits. The first differential integrating circuit may have a first input terminal connected to an output terminal of the first current sense integrating circuit, and the second differential integrating circuit may have a first input terminal connected to an output terminal of the second current sense integrating circuit. In addition, a second input terminal of the first and second differential integrating circuits may be connected together. The output terminals of the differential integrating circuit may be connected to respective current mode control circuits of the power converters. The slow loop current share control circuit may also include a pair of series-connected resistors connected between the output terminals of the first and second current sense integrating circuits. A node between the pair of series-connected resistors may be connected to the second input terminals of the first and second differential integrating circuits. The slow loop current share control circuit may therefore be configured to effectively null (i.e., minimize) errors (such as offset errors or peak-to-arrange errors) introduced by the high speed (or transient condition) current share control loop (i.e., the interconnection of the outputs of the voltage error amplifiers).
In another general respect, the present invention is directed to a current share method for a power supply having at least two paralleled converters for powering a load. According to one embodiment, the method includes generating a first voltage error signal based on an output voltage of a first of the paralleled converters and generating a second voltage error signal based on an output voltage of a second of the paralleled converters. The method further includes coupling the first and second voltage error signals to a common node, wherein an input terminal of a current mode control circuit of the first converter and an input terminal of a current mode control circuit of the second converter are both connected to the common node to provide a high-speed (or transient condition) current share control loop. The method further includes sensing currents in the first and second converters, and minimizing errors of the high-speed current share control loop during steady-state conditions of the power supply based on the sensed currents in the first and second converters.
In another general respect, the present invention is directed to a power supply module. According to one embodiment, the power supply module includes a power converter, a voltage error amplifier connected to the power converter and responsive to an output voltage of the power converter, and a current sensing element connected to the power converter for sensing a current in the power converter. The module further includes a slow loop current share control sub-circuit connected to the current sensing element. According to various embodiments, the power converter may be a buck converter, a boost converter, a buck-boost converter, or any other derived topology. The converter may also include a synchronous rectifier. Two or more such modules may be connected in parallel to form a current mode control power supply.